The Research Of A Radiation-resist Three-redundancy Satellite Embedded Computer System

Satellite embedded computer system works under the space radiation condition. Radio-effects brought by radiation condition are the most primary reasons for the breakdown of satellite. In order to enhance the robustness of satellite system, many fault-tolerant technologies like redundancy backup, build in test, or system static management have been used in satellite embedded computer system.This paper focus on some new challenges in the robustness of system. I improved the traditional’one active one inactive’ two redundancy system, and provide the design of a satellite embedded computer system with three same hardware redundancy=is. The main calculate node is not always same. It is decided after comparing the fault probability of all three calculate node. By this dynamic calculate node choose strategy, this system could guarantee that the calculate node is the most robust node of three. This strategy enhances the robustness of the whole systemThis paper also provides a fault detect system with a little fault prediction ability which is consist of a radiation prediction and a fault detect system based on the fault tree. Because the threshold of MOS will change after some dose of radiation, and the amount of the change in threshold has positive relationship with the radiation dose. I use this characteristic to predict the radiation dose by test the threshold of MOS and calculate the system’s fault probability. The paper replace the traditional profession fault detect system with the fault detect system based on fault tree. The fault tree uses the inner logic relationship of computer system to get a much more accurate detect result. I use Matlab software to simulate and compares the performance of these two system. The fault detect system with fault tree has a higher detect correctness than the old one.Moreover, this paper porvides a new EDAC linear code with a stronger fault correct ability. This paper also gives the fast running version by using the memory resources of FPGA devise.