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Research On The Testing Technology For The Testing Chip Of High-Speed SDRAM

Posted on:2016-11-13Degree:MasterType:Thesis
Country:ChinaCandidate:K B LinFull Text:PDF
GTID:2308330461955878Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Since the 21st century, humanity has entered the information age and relying on and demanding for information is increasing quickly. Advances of chip manufacturing technology makes the costs of integrated circuits reduce continuously, but the cost of testing an integrated circuit is almost the same, which makes people begin to pursue and develop more inexpensive test technology and equipment. At the same time, with the advances in communication, computer and multimedia technology, the capacity and performance of memory highlighted the higher demand. Due to its large storage capacity, fast read and write, read and write support for emergency and low prices and other advantages, Synchronous dynamic random access memory (SDRAM) was widely used. For the complex timing and refresh timing requirements of SDRAM memory, SDRAM would be had lots of relevant tests to ensure the integrity before the application.In this paper, an SDRAM chip IS42S16320B has be exampled. Function and electrical characteristics of SDRAM has tested using FPGA technology and the testing equipment of Teradyne J750.First the PLL controller has generated which control SDRAM timing and controller timing. The timing setting of the PLL control module is based on the timing of lead and lag which control the timing of SDRAM and SDRAM controller. Using SOPC Builder establish SDRAM controller and using Nios II IDE integrated development environment, functional test procedures has built. Functional test procedures include the detection of address lines, data lines and storage space. Detection of storage space also contains 0x55 testing, Oxaa testing and cumulative testing of whole space. After proving, this feature can be a good test platform to check the inspection status of SDRAM chips.The electrical characteristics of SDRAM is tested by Teradyne J750. Before Testing, test procedures was written by Teradyne IG-XL software and the pattern procedures which used in relevant testing was written by pattern provider. In this test, it includes a short-open circuit testing, DC parametric testing and standard function testing of SDRAM. DC parametric testing contains leakage current (IIL and IOL) test, VOL/IOL test, VOH/IOH tests. The testing results of DC parameters which was gained after testing were compared with the electric parameter of IS42S16320B automatically. After proving, this test can be a good test to complete the electrical parameters of SDRAM.In this paper, by the testing of functional and electrical characteristics of SDRAM, SDRAM chips has an in-depth research. The study can be completed for the detection of functions and electrical characteristics of SDRAM, and provide a good quality assurance applications for SDRAM chip.
Keywords/Search Tags:Synchronous Dynamic Read Random Memory(SDRAM), SOPCSystem Technology, Teradyne J750, Electronic Characteristic Testing
PDF Full Text Request
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