Embedded SRAM Build-In-Self Test And Repair For Failure Analysis Based On Redundancy Shared

Now, semiconductor integrated technology has been widely used in the latest electronic equipment and the embedded memory occupies the absolute status in the chip. The proportion of occupied chip area is growing, but also for a more prominent role in the chip. It has become a significant feature of the chip development. However, due to its complicated structure and high density technology, we will find many chips do not pass in wafer testing process. The reason lies in the malfunction of the embedded memory. As a result, the wafer yield is low. It has become an important factor to affect the chip yield. One thing must be clear is that the testing cost is an important factor, because it can help to reduce the production cost of our chip. Even under the condition of optimization, testing costs can sometimes accounted for about 40% of the total cost device. In order to improve the whole wafer yield and improve the reliability of embedded memory, it is very important and urgent to repair the faulty embedded memory in the process of testing. It will have great market application value and therefore worthy of further study.1. Firstly, This article is discussed from the So C embedded memory test development process. This article makes a deep research in built-in-self test(MBIST) of the DFT and shows us the memory circuit structure and operation principle. We analyze the characteristics of the three methods about the embedded SRAM memory test, and our research is mainly focused on the embedded SRAM memory built-in self-test method and analyzes the common fault type and embedded SRAM memory tests test algorithm. The Built-in-self test method is not only good at solving the problem of embedded SRAM memory tests, but also greatly improving the test efficiency and reducing the test time and test cost. In view of the problem that costs too much chip size in the traditional repair technology, specific optimization method for traditional repair technique is put forward. Then do a thorough analysis of specific optimization process and focus on Global System for External Redundancy.2. Moreover, I build the overall testing process in the ATE test platform. By debuggingand optimization of test program, I make actual online test of the wafer. After analyzing and summarizing the test results generated by the system, we can find that, through the process of embedded memory repair, the yield is increased by 3% to 4%. It can reduce the loss of the chips to achieve the desired goal and also verify the correctness and feasibility of the whole test process solutions.3. This article is discussed from the So C embedded memory test development process. This article makes a deep research in built-in-self test(MBIST) of the DFT and shows us the memory circuit structure and operation principle. We analyze the characteristics of the three methods about the embedded SRAM memory test, and our research is mainly focused on the embedded SRAM memory built-in self-test method and analyzes the common fault type and embedded SRAM memory tests test algorithm. The Built-in-self test method is not only good at solving the problem of embedded SRAM memory tests, but also greatly improving the test efficiency and reducing the test time and test cost.4. Finally, the test program is optimized and the optimization of three kinds of test method is proposed. If the chip also fails after built-in-self test and repair process, at the end of the test program we can increase the testing process for subsequent failure analysis. Results show that the whole testing process of wafer yield increased and help to reduce the test time and it can be good for embedded memory failure analysis. The method is effective and it provides the technical support for embedded memory built-inself test and global redundancy repair. This method has a great application prospects.