Design And Implementation Of RC5 Encryption Chip Based On FPGA

As the informatization of national economy and society, information security is drawing more and more attention. Cryptography is the crucial technique in the information security field, so the research on it becomes even more important and exigent.The design and implementation of RC5 encryption chip based on FPGA are introduced in this dissertation. The length, encryption round number and length key of RC5 encryption algorithm are all changeable, and this algorithm only involves elementary operations, which has made it have good adaptability and high speed of operation and become very suitable for hardware and software implementation. As a result, RC5 encryption chip has extensive application.Based on the analysis of RC5 encryption algorithm, this dissertation puts forward a scale-optimized circuit design based on full circulation pattern, which only provides hardware circuit needed to achieve a round of encryption transformation in the chip. Under the control of finite state machine,12 rounds of encryption transformation cycle of a set of data are completed through the use of the circuit 12 times.Based on the above-mentioned design idea, this paper carries out a detailed design of the architecture of RC5 encryption chip with 32 bit of word length,12 rounds of encryption round number and 16 bytes of key length, and establishes the Verilog HDL model of the chip and conducts functional simulation. Besides, based on the FPGA, a comprehensive optimization, the layout of the wiring and a static timing analysis are conducted on the Verilog HDL model; finally, RC5-32/12/16 encryption chip is implemented, and test is made in a real application environment. Test results show that the designed RC5-32/12/16 encryption chip realizes the expected function.The development platform is Modelsim 10.0 and Quartus Ⅱ 9.1, FPGA chip for hardware simulation is Cyclone EP1C12Q240C8 from ALTERA Company. The experimental results show that,1782 logic units are used on RC5 encryption chip, with system clock frequency reaching 64.4MHz, the peak speed of information encryption being 343Mb/s and the power consumption of the system being 82.54m W.