Research And Implementation Of Lightweight Block Cipher Oriented To Architecture Optimization

With the rapid development and popularization of the Internet of Things(Io T),the deployment fields of resource-constrained Io T devices such as electronic labels and wireless sensors have become more and more extensive.The design and implementation of lightweight block ciphers to ensure the information security of these devices has become a very important research hotspot.This paper is dedicated to the research and implementation of architecture-oriented lightweight block ciphers,focusing on the hardware optimization methods of lightweight block ciphers.The components and hardware architectures of PRINCE are optimized by combining technologies such as minimizing circuit,shortest path and best sharing.At the same time,a new lightweight block cipher algorithm SCENERY based on the balanced Feistel structure is proposed using bit-slice technology.The main work content is as follows:(1)The components and the basic principles of the encryption process of PRINCE are analyzed,and the components and hardware structures of PRINCE are optimized using techniques such as minimized circuit,shortest path,and optimal sharing.In order to achieve the purpose of minimizing the circuit and storage space,a new method of using fewer circuits to implement the Mix Columns module is proposed,and a new variable₁^?is introduced to integrate and optimize the hardware implementations of the round constant addition and the round key addition.Based on the optimization of components and the best sharing ideas between components,three hardware architectures of PRINCE are proposed:unrolled structure,low-cost structure and two-cycle structure.The experimental results of Virtex-6 show that compared with the existing implementation methods of PRINCE,the resource consumption of the unrolled structure,low-cost structure and two-cycle structure are reduced by 73,119 and 483 Slices respectively.Three new proposed architectures have higher resource efficiency,and is suitable for low-resource,low-latency encryption applications.(2)A new lightweight block cipher SCENERY algorithm based on the balanced Feistel structure is proposed by using bit-slice technique.The block length of SCENERY is 64 bits,the key length is 80 bits,and the number of iterations rounds is 28.In order to ensure the diffusion speed of the balanced Feistel structure,a binary matrix which can be realized by shift and XOR operations is applied in the diffusion layer.The avalanche effect experiment shows that the SCENERY can achieve complete dependence after four rounds.At the same time,in order to improve the security of the key,a new key expansion method with dynamic replacement is applied.Through analysis and verification,this method randomizes the key generation and improves the complexity of key reverse derivation.In addition,this paper analyzes the security of SCENERY based on MILP model.The results of analysis show that SCENERY can resist differential analysis,linear analysis and impossible differential analysis,and has high security.Finally,three hardware implementation methods of different architectures of SCENERY have been designed and implemented using FPGA technology.The experimental results of Virtex-6 show that the round-based architecture requires 130 Slices,and the throughput and encryption efficiency are 1234.56 Mbps and 9.5 Mbps/Slice respectively.Compared with other ciphers,SCENERY achieves a good compromise in area consumption,throughput and encryption efficiency.