Parallelization Of MIMO Detection Algorithms And Vector Processor Based Implementation

As one of the key technologies of the mobile communication system, Multiple-input multiple-output (MIMO) technology greatly improves the data tranmission rate and satisfies user’s diverse demand for mobile services. However, with the growth of the number of antennas and the modulation order, the complexity of MIMO detection process grows exponentialy, which has become a performance bottleneck at the receiver. Therefore, under the premise of guaranting high performance, parallelizatoin of the MIMO detection algorithm with low complexity, is significant for improving the overall performance of the receiver.On the other hand, the evolution of wireless communication standard requires a mobile terminal has stronger data processing capabilities as well as better flexibility, configurable and reusable performance. Application specific instruction set vector processors can not only optimize the structure for specific applications in order to provide strong processing capability, but also take advantage of the programmable, customizable and extensible instruction set to provide the flexibility to switch work mode and to upgrade or repair. Therefore, from a combination of algorithms and implementation point of view, research on adapting MIMO detection algorithms to programmable vector processor implementations, has engineering significance.This thesis focuses on parallelization of the MIMO detection algorithm and vector processor-based special implementations. The main work is as follows:1. Analysis and design of parallellel MIMO detection algorithmA new MIMO detection algorithm, Partial Inter-layer Parallel Sphere Detector (PIPSD) is proposed. The basic idea behind the proposed algorithm is to utilize a new form of complex-to-real lattice transformation and to simultaneously compute every two adjacent layers of the equivalent search tree. Experimental results show that the proposed algorithm can significantly reduce the execution cycle and improve system throughput with little performance loss.2. Implementation of vector processor based parallel MIMO detectorA highly efficient parallel MIMO detector is implemented, which is based on the prototype of a hybrid architecture of VLIW (Very Long Instruction Word) and SIMD (Single Instruction Multiple Data) vector processor. The features of the PIPSD algorithm fully merged with the intrinsic parallelism of the vector processor and some strategies, such as tuning the architecture parameters, customizing the function units and instruction set and optimizing VLIW distribution, are developed to support multi-mode detection while minimizing execution cycles and maximizing decoding throughtput.