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The Research And Implementation Of High Performance Video Encoder Based On The Heterogeneou Multicore System

Posted on:2016-04-28Degree:MasterType:Thesis
Country:ChinaCandidate:H LiFull Text:PDF
GTID:2298330467991834Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
Compared with the previous H.263and MPEG-4standards, the wide spread H.264standard and the advanced technological HEVC standard h ave been improved greatly in compression efficiency and image quality. So this paper chooses the H.264and HEVC high-performance vedio enc oder as the main research topic.With the rapid increase of vedio encoding algorithm complexity, traditional encoding system based on high-performance single core processor or Homogeneous MPSoC can not meet the requirement of real-time encoding.Heterogeneous MPSoC can not only provide general computing ability,but also offer dedicated hardware accelerators to processing data cocurrently.So we use the Zynq processor which integrate ARM and FPGA to build heterogeneous multi-core processor system, transplanting Embedded Linux on ZedBoad board and develop related drivers.Finnaly We implement the x264open source algorithm at the top of the Heterogeneous MPSoC software architecture.Firstly,three communication method is designed and completed for different scenarios and communication rate requirements.The method are designed based on AXI interface and shared memory:Communication method based on AXI_GP interface which provide low speed rate,communication method based on AXI_HP interface which provide high speed rate, communication method based on AXI_ACP interface which provide low-delay rate.The driver development for the embedded Linux is also completed. Secondly,we study the key technology of high performance encoder and Zynq-7000processor,conducting software and hardware collaborative design on the hererogeneous multi-core system.The ARM platforms run embedded Linux and x264encoding algorithm serially. The MicroBlaze Softcore processor run some function as co-processor. We use the HLS tools to convert some encoding module into hardware IP core which run complex and time-consuming modules using its abundant logic resources and parallelism. The experimental results show that for standard definition video sequences, the PSNR(Y) of the encoded stream which present the image quality could decrease0.0024dB averagely, with an up to2.39times of encoding speed.Finally,we introduces the concepts and coding process of the HEVC standards,testing the time-consuming of intra prediction and inter prediction function respectively under PC platform.Then we give the analysis of the function complexity. We make sure that the optimizing focus is inter prediction, and an optimization of the motion estimation algorithm was proposed.The experimental results show that for high definition video sequences, the encoded stream bit rate could increase0.25%averagely, with an up to3.9%decline of encoding speed.
Keywords/Search Tags:Heterogeneous MPSoC System, Communication WithinMulti-cores, H.264, HEVC
PDF Full Text Request
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