Research Of Communication With Loosely Coupled Method Between Heterogeneous Dual-core

With the increasing demand for products of human capabilities, designers are constantly exploring with lower power consumption and higher performance processor chips. At this stage, single-core processor chip has been unable to meet the higher demands of human and efficient processing of the data and designing more reliable and faster single-core processor chip has been difficult to strike a balance between performance and power consumption.Since 2005, the first civil dual-core processor of AMD put into the market, the performance of its superiority quickly gained market recognition.Since then,the multi-core architecture develops at an unprecedented rate.Although the multi-core architecture has excellent features compared with many mononuclear structures, but also brings the issue of information sharing to the designers, such as shared Cache competition,increased levels of shared storage problem, the problem of limited memory bandwidth,shared information consistency and assignment problems, these problems gradually become the bottleneck of multicore processor performance.This paper aims to achieve heterogeneous SoC which has the optimal chip power consumption ratio, using the different characteristics of the core processor to optimize their internal structure, and discuss the problem of inter-core communication on heterogeneous dual-core SoC, including responsible for task scheduling and management of general purpose PowerPC processor and a DSP processor of intensive data processing. According to the platform, this paper studies the issue of communication between heterogeneous dual-core SoC.Considering power consumption, design complexity and the needs of the project,excluding the tight coupling communication method of shared Cache and on-chip network,this paper uses a method of communication between heterogeneous dual-core loosely coupled, which have advantages of a little difficult development, low work consumption and high communication speed, especially for less rapid development of nuclei, to reduce design costs and shorten the development cycle to provide good support.The communication method of loosely coupling using multi-bus architecture,including the PLB bus, DCR bus and AXI bus. And the method designed three different communication strategies for different requirements and lengths of data, they are less demanding on performance and limited time of development of smaller data length SEAMPHORE communications strategy, provide MailBox messaging policy of hardwaresynchronization measures and based on larger data communication strategy of DMA.Meanwhile, considering the access to the shared data, in particular designed DPRAM controller of the cross-bus protocol, which is a full protocol handshake of salve device compatible with PLB and AXI bus protocol, can be accessed by master device arbitrarily.In addition, the platform is designed with priority multiplex interrupt and fault-tolerant mechanism for the problems that may arise during the communication process. This mechanism find errors by inserting data label and use high priority interrupts transmission of the current error and reconfigure the current communication service program in order to achieve the purpose of correction.Finally, through Cadence simulation test tools, this paper calculate the rate of different communication strategies and by analyzing achieve that obtain short data transmission can be used SEAMPHORE communication strategy. Long data can be used DMA communication strategy, the synchronization of key information can be used MailBox communication strategy and three letters policies can be used in conjunction with each other. At the same time, simulate the communication error that occurs, by fault-tolerant mechanism to correct the error, and ultimately meet the design requirements.