Multicore Processor Initialization And Design Of High-speed IO Interface

Multi-processor System-On-Chip (MPSoC) can design specialized for all kinds of target applications by making full use of the parallel processing ability of multi computing resources and SoC’s highly integration. So that the hardware architecture of the system can meet the needs of the target application better, and be able to maximize overall system performance. Numerous communication architectures have been proposed to provide a viable solution to meet the complex application of large-scale computing and real-time requirements, which gradually evolved into a multi-processor system and the main trend of the next generation of integrated circuit design.This article described basic communication architectures for MPSoC, and proposed an initialization method for MPSoC. In this method, flash was connected to communication node as the source of initial data, and network packets were used to initialize Multi-core one by one. The separation of guide procedures and user main program showed some advantages at versatility, portability and scalability. A Flash Wrapper was designed to read the boot program from flash for the initialization of all clusters, which used finite state machine to achieve the establishment and transmission functions of the link and completed the conversion from Flash to PCC protocol. In addition, we introduced Rocket IO and Aurora protocol of8b/10b encoding and decoding, and designed Rocket IO Wrapper, which was based on multi-core chip for high-speed data transmission. Based on Xilinx FPGA development platform, we reproduced the entire system and verified the design module for data transmission step-by-step.