Research Of Cluster Nodes In Heterogeneous Multi-Core SoC

There are two kinds of nodes in heterogeneous Multi-Processor System-on-chip (MPSoC), that is, computing nodes and communication nodes. Thereare various computing resources in heterogeneous MPSoC, such as CPU, DSPor accelerating unites. according to the features of application, design andcalculation of cluster node architecture has a certain exploration space. Thispaper focuses on the Computing Nodes in Heterogeneous Multi-core SoC.One of the research problems is how to design the computing clusterarchitecture and bus arbitration methods to enhance the whole systemperformance. In this paper, The main research is as follows:Firstly, the performance of an existing floating-point processing unit(FPU) of Microblaze processor is studied. Although it can be used in MPSoCwith less cost, its performance should be evaluated first. Experiments resultsshow that the performance is acceptable for add, minus and multiplicationoperations, but not for sine, cosine or tangent operations.Secondly, a CORDIC based FPU architecture is designed andimplemented for sine and cosine operations. Experiments results show thatthe positive cosine function implemented in CORDIC algorithm with16stages of pipeline iteration can achieve the iterative accuracy of10-7to10-5.Finally, a Microblaze based computing cluster node for MPSoC isdesigned to study the arbitration poilicy, such as round-robin priorityarbitration, timing multiplexing arbitration and dynamic lottery arbitration.Experiments results show that all these three arbitrators have high resourceutilization, and do not exist phenomenon of starve-to-death or resource-monopoly. Furthermore, the dynamic lottery arbiter can adapt to the actualapplication requirement.