The Design And Implementation Of Verification Software For Process Design Kit

IC process design package PDK (Process Design Kit) is firstly proposed by Cadence based on its analog design platform. PDK is a bridge between IC manufacturing and IC design. PDK can shorten the design cycle and improve design productivity and efficiency because PDK includes process data, model and design reference EDA tool interface shorten. PDK includes a very large number of data files and have many versions with the process improvements. PDK is very helpful and important to improve design efficiency so a comprehensive verification system of PDK is urgent to PDK developer.Current industry not has a very good PDK verification tool so the author design and implement a PDK verification tool which named PQLab. User can implement integrity verification of PDK, CDF parameter and callback verification, device DRC/LVS verification, Pre/Post simulation and some others on PQLab. PQLab supports both CDBA and OA database at the same time; and PQLab supports most of EDA tools which used in analog design not limited to Cadence EDA tools. PQLab runs DRC/LVS verification tasks in parallel by split the task to several sub-tasks.PQLab has a very clear module structure and a very flexible, friendly and user-friendly GUI. PQLab implemented multiple process nodes PDK verification flow which is from SMIC0.13um to40nm process. PQLab users can build their own comprehensive PDK verification flow simply and quickly in PQLab. PQLab meets the industry demand of PDK verification and fills the gaps of ED A tool in PDK verification.