| In recent years, with the rapidly growing demand for multimedia services and diversification of telecom business, WDM-PON represents the development tendency of access network due to the advantage of high bandwidth capacity, wide range of network coverage, more transparency, high information security and high flexibility, which makes it become the development direction of access network eventually. Optical transceiver unit is the core part of WDM passive optical network, and it is also the key to implement the system function, improve performance and reduce cost. Under the WDM-PON application background, this thesis focuses on the design of arrayed high-speed optical transmitter and receiver based on FPGA high-speed serial transceiver technology. The achievements of this thesis are as follows.(1) To design the module with the function of clock and data recovery and to complete the schematic design and PCB design of the CDR circuit according to the requirements of high-speed circuit design. Recovered waveform, eye diagram and bit error rate of its data and clock are experimentally tested.(2) To design the test circuit of SFP optical transceiver module and to complete the schematic and PCB. The function of optical signal receiving and sending and the performance of SFP is experimentally tested by the use of oscilloscope and bit error tester.(3) To design each module in FPGA system, including GTX high-speed transceiver module, clock management module, reset module and ChipScope observation control module based on Virtex-6series FPGA chip of Xilinx company. At last, writing test bench file to stimulate the logic functions of various modules and the whole system by use of Modelsim software.(4) WDM Arrayed Optical Transceiver Based on FPGA is completed and experimentally tested. The experimental system is set up to test the performance of the system by observing the output waveform and bit error rate. Finally the results of the test have been summarized. |
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