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The Design And Implementation Of High Performance Range-Matching CAM

Posted on:2015-07-20Degree:MasterType:Thesis
Country:ChinaCandidate:C L YinFull Text:PDF
GTID:2298330467480537Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Content-addressable memory (CAM) is a web search engine which is mainly used in wide data bits and high-speed forwarding occasions. For commonly used range-matching routing lookup function, CAM has carried out the shortcomings of the range-matching inefficiency so that it can not meet the current requirements of large-capacity and high-speed network. Although the range-matching CAM circuit can solve the problem of inefficiency, it is slow and large power consumption. How to reduce the power consumption of range-matching CAM, and while increasing search speed is an urgent problem. What is more, with more and more bits of data width, CAM cells on CAM match line is increasing. The current match line structure is difficult to design a feedback circuits when the cells is increasing and what worse, the noise immunity and robustness ability of the circuit is deteriorated. How to increase the number of CAM cells connected to each stage of the match line circuit and improve the noise immunity and robustness ability of the circuit are the key issues in the current study.To solve the above problems, this paper presents improved range-matching CAM cells. Compared to the design before, the new CAM cells have a small number of transistors and the internal node voltage swing is high. It also presents a new cascaded range-matching CAM cells circuits. In this circuit, the priority exists, and it can take advantage of the pseudo ground effect to improve the speed. The article also presents a static and dynamic hybrid match line which is used in range-matching CAM word. This structure can be evaluated in the pre-charge phase, which greatly reduces the critical path of the evaluation phase and balances the required time of pre-charge phase and evaluation phase so it can be applied to improve the clock frequency.This paper also proposes an improved PF-CDPD AND gate structure. The structure uses parasitic capacitance of the limited transistors in the pull down network as compensation capacitor to provide a charge-compensating for the deepening pull-down path. It increases the size margin of feedback transistor, and increases the depth of the pull-down path.The high-performance range-matching CAM structure designed in this paper can be applied to the need for high-speed and wide bites data occasions, such as the new generation of routing and forwarding, virtual private filtering networks. It is with high potential application value.
Keywords/Search Tags:CAM, Rang-Matching, High Clock Frequency, Enhanced PF-CDPD ANDGate
PDF Full Text Request
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