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Design And Implementation Of24-bit Delta-Sigma A/D Converter

Posted on:2016-12-09Degree:MasterType:Thesis
Country:ChinaCandidate:J Q ZengFull Text:PDF
GTID:2298330467472719Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the development of digital signal processing and integrated circuits, high-precision A/D converters play an important role in the modern digital processing and digital communication systems, which have been widely applied in temperature monitoring, precision measuring instruments and other signal processing systems.A high-precision24-bit Delta-Sigma A/D converter used in temperature monitoring is designed and implemented with SMIC0.18umCMOS process. The main work and innovations are as follows:1. A/D converters in different structures and their advantages and disadvantages are analyzed, as well as the key performance metrics. The structure of A/D converter is Delta-Sigma, which is focused on. The values of performance metrics are determined.2. Through theoretical analysis, the order of the modulator and the oversampling factor are confirmed in this paper, as well as the type of the digital decimation filter. The structure of the modulator and the digital decimation filter are confirmed by system simulation for ideal model in Matlab. The non-ideal parameters are assured to be reasonable by a large number of simulations. The effective number of bits is25.30bits through system simulation in Matlab for Delta-Sigma A/D converter.3. There are sub modules of the modulator, such as operational amplifier, dynamic comparator and integrator, etc. Compensation capacitors and resistors are added to operational amplifiers to assure stability. RS flip-flops are added to dynamic comparators to ensure that the output is reasonable. And the simulation for transistor-level circuit of the modulator and power spectral density for the result in Matlab are done, the effective number of bits is23.56bits. The design of the digital decimation filter in RTL-level is done, as well as functional simulation. In order to reduce the use of hardware resources, CSD coding is used for coefficients of the CIC compensation filter and the half band filter, which can reduce adders that are used in multiplications and greatly reduce the hardware resources.4. The layout is designed for the modulator circuit, as well as rational distribution and planning. The power spectral density is analyzed for simulation results in Matlab, and the effective number of bits is21.20bits. The layout area of modulator is0.11mm2. When the bandwidth of signal is2KHz, the SNR of the modulator can be129.35dB and the effective number of bits is21.20bits.
Keywords/Search Tags:A/D converter, Delta-Sigma modulator, noise shaping, digitaldecimation filter, CSD
PDF Full Text Request
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