Design Of20-bits3-order Σ-Δ Modulator

With the development of integrated circuits, a growing number of analog circuitis replaced by the digital circuit. However, the signal we deal with in the real world isanalog. We have to use analog to digital convertors for the sake of connecting the realword and the digital world.Σ-Δ modulator has become one of the best ways to realize the conversion for theanalog signal to digital signal in CMOS process. Compared to other types of ADCs,Σ-Δ ADC, which is based on oversampling, noise shaping and digital filteringtechnique, while reducing the performance requirements of analog circuit, can achievehigher accuracy.Follow top-down design method, within a supply voltage of5V and the signalbandwidth of20kHz, a Σ-Δ modulator is realized with the effective number of bits of20bits for the field of high-precision measurements. At first, the basic principles andperformance specification of ADC and the operating principle of Σ-Δ modulator isintroduced, and the advantages and disadvantages of common structures is analyzed,Based on these, the method of selecting appropriate structure is summarized. Then,according to the specification of the modulator system, a appropriate architecture with3-order single loop1-bit is selected, the transfer function is modeled and optimized byusing MATLAB, and summarizes a complete design method, and the system-leveldesign is completed based on this. Then, the various nonlinear factors that may affectthe performance of modulator, such as non-linearity and noise, are analyzed in detail.The power of each error which is induced by nonlinear factor is derived. Andsimulation based on non-ideal behavior model also has been carried out so that thedesign of circuit blocks are more trustworthy. Finally, each unit circuit module isdesigned. Based on the simulation and analysis for the whole circuit of the Σ-Δmodulator is down. In the design of circuit blocks, the operational amplifier adoptshigh-gain two-level architecture. The common mode feedback is realized bycombination of switch-capacitor circuits and the error amplifier, which could givebetter stability of the output of the common-mode voltage. And the design ofcapacitors and switches are reasonable. These design optimize the performance of Σ-Δmodulator. The chip is implemented by MXIC’s0.35μm CMOS technology. When theinput sine wave signal is implemented within the Frequency of281.2Hz and theamplitude of-3.5dB, The simulation of the modulator shows that123.6dB SNDRhas been achieved within bandwidth of2kHz, which means the design requirementsfor high-precision measurements is achieved.