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Research And Design Of High Precision And High-performance Floating-point Division And Square Root Unit

Posted on:2015-11-12Degree:MasterType:Thesis
Country:ChinaCandidate:G B WangFull Text:PDF
GTID:2298330431981196Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
With the rapid development of integrated circuit technology and the higher density of chip assembly, the floating-point computation ability has become an important index to evaluate the performance of CPU following the frequency. So FPU (floating-point unit) is usually been designed as dedicated component in modern microprocessor, and which is indispensable part. Various general purpose processors almost have integrated floating-point arithmetic unit, but the processing precision is limited to32bits single and64bit double, they can’t meet the application of the high precision calculation, graphics, digital signal processing and other fields. The division and square root is relatively complex operation during floating-point basic operations, usually realized by iterative multiplication method, and the look-up table and multiplier width has greater restrictions on floating-point performance. Therefore, it is important and significant to design high precision and high-performance floating-point division and square root unit.This thesis introduces the floating-point processors and floating-point format of Intel and AMD, the floating-point format specified in IEEE-754, then analyzes the principle and mathematical formula of division and square root, and studies the Goldschmidt algorithm based on Newton iteration. In addition, the thesis researches the method of the construction of look-up table and multiplier dimension, this design adopts the method of multi-table addtion and75x75multiplier. After that, the detailed design of calculation unit is described. The designed unit in function can finish division and square root with high precision and high-performance, and supports32bits single,64bits double and80bits extended precision. In the hardware implementation, ASIC full custom circuit design method is taken, the synthesis is completed using SMIC0.13μm library. The result manifests that the designed unit meets the requirements of working frequency and performance.The arithmetic unit has been taped out and applied.
Keywords/Search Tags:Floating-point Division, Square Root, FPU, Look-up Table, Goldschmidt
PDF Full Text Request
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