The Research And FPGA Implementation Of HD Hybrid Video Matrix

Video matrix is a devices which can switch any of the input video source to anyoutput channel, it is a core component of video surveillance systems, video directing,video conferencing, education and other various video systems. Because of the rapiddevelopment of video technology, and now there are more and more types of videosources, Video display one by one,it can not solve the video display has a largedisplay video images, switching tone look and allocation sharing.So the video matrixbecame necessary choice. And now most of the videos is high-definition signals, HDhybrid video matrix is generated based on these developments. To achiveHigh-definition video matrix.we must pay close attention to collection mixingdifferent video formats, transmission and processing. HD video signal has a large ofdata,to capture and transmit the real-time video data,it need the hight bandwidth,andhigh processing speed.So the design of collection and transmission scheme to reducethe bandwidth limitations of hybrid video matrix has become an important researchdirection. Able to adapt more video formats, and the video matrix has more videochannels, so that it has a more promising market.This paper firstly analyzes hybrid video matrix’s theory and architecture, thenanalyzes the principles of the system and the implementation of each module. Thesystem is divided into three modules,they are input modules, switching backplanemodules and output modules.This three modules complete the acquisition of videodata, exchange and sharing of video data,processing the video data.Each part ofsystem are modular design with pluggable board pattern on the structure, the entirestructure is easy to expand.It uses FPGA to acquire and process the video data, thevideo data transport with uncompressed,this performed to ensure the quality of HDvideo.Each video output processed separately, using pure hardware architecture toimprove processing speed, enhanced real-time, to avoid the bottlenecks of CPUprocessing speed.Each video using the SERDES (SERializer/DESerializer)individually transmitted to reduce the impact of the video signal may not affect thebandwidth of the bus of the CPU bus.Output image using advanced image scaling technology, using a good zoom effect template bicubic convolution algorithm toensure that the image is clear and sharp.Finally, verification by testing the various modules and machine.This system hasbeen completed the expected design goal.This has been completed VGA DVI HDMIvideo signal acquisition, transmission, processing, and encoding output. The user canswitch the the video image, and acquire a clear video image output.This system hasbeen achieve the function of video matrix.