The Design Of The USB3.0-GPID Controller

GPIB is a kind of widely used General-Purpose Interface Bus in electronic measuringinstrument, it has a parallel bus transfer speed, driving ability strong, effective data rate ishigh, big communication distance, good anti-jamming performance and generalcharacteristics of use,etc.Using its electronic measuring instrument and computing units canbe built a set of modular, modular automatic test system. The automatic test system based onGPIB bus to be formed, the core is the GPIB control machine. Realize GPIB control machineis the simplest method is to connect a GPIB controller on the computer, and GPIB controllermust have can directly connected with the computer interface.This topic for the GPIBcontroller board who Based on the traditional interface bus (such as RS232-GPIB,PCI-GPIB, ISA-GPIB, etc.),installation of trouble, not suitable for mobile measurement,expensive, restricted by computer slot number, address and interrupt resources and poorscalability problems, and will start new USB3.0technology into the design of GPIB controlerboards, GPIB controller board has added more advantages.This topic s main work consists of three parts: the first part is responsible for the entireUSB3.0-GPIB controller board s hardware principle diagram design and implementation ofGPIB controller interface card. The GPIB card hardware mainly includes the USB3.0interface control chip, GPIB interface control chip and the FPGA platform to realize interfacecontrol. USB3.0control chip select Cypress company s CYUSB3014chip, and GPIBinterface control chip is due to the limitation by professional purposes, are expensive and buythe inconvenience, the influence of the thinking of the feasibility of this topic design, cost andproduct production factors, such as using Verilog HDL hardware description language todesign the GPIB control chip s IP core based on FPGA, the FPGA chip select ALTERAcorporation s EP3C16F484industrial-grade chip. The second part is mainly responsible forimplementation the FPGA and computer data communication based on the USB3.0interface.This section includes the USB3.0s firmware design, the FPGA control GPIF II interface readand write operations and the FPGA control2pieces DDR2for table tennis to transmission data. The third part is mainly responsible for GPIB interface control chip s IP core design.GPIB IP core design includes each interface function module design, reading and writingcontrol module design, the design of the configuration register module and terminal moduledesign, etc.After implementing the above content, integrating three parts to USB3.0-GPIB controllerboard debugging, commissioning work mainly includes the start the enumeration of testing,see the data flow testing analysis of various functional modules and GPIB IP core compilationand simulation.This topic implemented the USB3.0and computer s four threads, the correctdata communication.GPIB controller s IP core design has been completed each interfacefunction module, reading and writing control module program compiling and simulationvalidation.