Font Size: a A A

Research On Deadlock Recovery Based On Topology Order And Elastic Credit For NoC

Posted on:2013-07-06Degree:MasterType:Thesis
Country:ChinaCandidate:Y R QiaoFull Text:PDF
GTID:2298330422973934Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
In recent years, the computing performance promoting for traditional singleprocessor gradually come to the limit, CMP Technology will do for some time in thefuture as the main means of performance improving for processor. But with increasingintegrated number of cores on a single chip, the communication between cores isincreasing. How to make full use of on-chip resources, build efficient on-chipcommunication network, has become an important research topic for computerarchitecture researchers. Technology in network off-chip can be used, but because ofenvironmental changes, these technologies cannot be simply copied to the on-chip,optimization must be done to adapt to the physical characteristics of on-chip platformfor new applications and needs.Deadlock recovery technique can solve the deadlock problem in fully adaptiverouting, but in the network off-chip, due to the hardware constraints, the accuratedeadlock detection is difficult to achieve, and recovery also costs too much, whichlimited the development of deadlock recovery technique. This article discussed thecurrent solutions to the deadlock and introduced an Accurate Cycle Forwarding ACF fordeadlock problem. Then presented an exact deadlock detection mechanism TopologyOrder Detection, TOD based on the new hardware characteristic of NoC and an ElasticCredit Transfer, ECT deadlock unlock mechanism, solving the previous problem withminimal hardware overhead.And certification platform HNRsim were set up. The verification platform cansupport Mesh and Torus network topology with configurable size, supports multiplerouting and communication patterns. Routing and traffic patterns, network switching,packet length, fragment size, injection rate, and other key parameters can be configuredaccording to user needs.This article made simulation for TOD and ECT technology in clock accuracy onHNRsim verification platform, and also other related technology under different trafficpatterns at different injection rates and comparison on performance and hardware costs.Overall, the performance of the new technology is better than dimension order routingtechnology, averagely can reduce the70%transmission delay, compared to thetraditional time threshold detection with deadlock recovery technique of DISHA, it alsohas obvious performance improving. In addition in terms of hardware cost, compared tothe Baseline network, area is just increased13%, and saves27%of area overheadcompared with DISHA technologies.
Keywords/Search Tags:network on chip, deadlock recovery, topology order, elasticcredit
PDF Full Text Request
Related items