Design Of NoC System Based On Or1200

With the increasing number of IP cores, the communication architecture on chip is the bottleneck for SoC performance, the shared bus on chip has some limitations that can't be solved, and these become the challenge to the traditional SoC communication architecture. At this time NoC, as a new solution, is presented. The scalable ability of NoC well meets the challenge of new design requirement. NoC gradually becomes a new communication structure besides traditional on-chip bus.This paper introduces a system of NoC, in which we use the open source IP cores the community of OpenCores provides, including OpenRISC1200, UART and Conbus IP core. Since we focus on the NoC structure building, the buffer and MMU are not configured in the processor. In order to be compatible to the OpenRISC architecture, the designed IP cores are according to the WISHBONE criterion, including the memory IP core and the component controlling the program synchronization.This paper uses the tree topology, the deterministic source routing, and the store-and-forward strategy to switch the packet. Concerning with the flow control, by removing the handshake signals from the network interface, we remove the possibility of a deadlock, since packets can not be blocked. And at the same time, by increasing enough buffers, we remove the risk of the packet to be lost due to overfilled buffers. Since the number of buffers is an important factor to occupy the resource, we particularly talk about the problem in this paper.With the area and performance comparisons of the tree and bus structures, we can conclude that the NoC get a better performance with larger area. Finally we talk about the shortage in the system, analysis the factors affecting the parallelism and give the improved version.