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Implementation Of Cable Digital TV Broadcasting Channel Coding And Multi-frequency Modulation Using FPGA

Posted on:2009-11-24Degree:MasterType:Thesis
Country:ChinaCandidate:X P JiFull Text:PDF
GTID:2178360245494290Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the coming of the schedule of opening digital TV in the whole country, digital TV technique has been developed greatly and been further standardized in the aspects such as baseband source-signal data and channel transmission,while the transmission methods of digital TV become wider and wider and it has been developed rapidly in transmitting the signal of digital TV through satellites,earth land and CATV networks.With the lucky of Olympic Game the application research of digital TV is just in the ascendant.Task of the subject is to complete the design and implementation Modulator, which is an important equipment of cable digital vedio broadcasting,with the core chip FPGA device selection.System hardware to achieve national standards GY / T 170-2001(cable digital TV broadcasting channel coding and modulation standards)as the main basis,and Xilinx's Virtex Series(Virtex 4,Virtex 5)chips and related development board(ML402,ML506)as a platform,the main task is based on relevant standards of its practical technology research and development.Completed channel coding and modulation of the module,Verilog HLD the preparation of procedures(or IP core call),and simulation and debugging in the board and the FBI work,and is designed to improve the integration of the entire system under the premise of multi-frequency modulation.The objective of the subject is to complete design and implementation of modulator,which is an important equipment of digital cable TV,using FPGA as chief chip.Hardware of the system implement mainly according to national standard,GY / T 170-2001(Specification of framing structure,channel coding and modulation for digital cable broadcasting system),and use Xilinx's Virtex Series FPGA chips(Virtex 4,Virtex 5)and related evaluation board(ML402,ML506)as a platform.The main task of the subject is to complete practical technology research and development based on relevant standards.The subject complete module division of channel coding and modulation,Verilog HLD code writing(or IP core call),and simulation and debugging and joint debugging in the board.The purpose of the design is to complete multi-frequency modulation under the premise of improving the integration of the entire system.Based on the study of existing digital TV network technology and relative products,and on the basis of the national standard,GB GY/T 170-2001,and other relative standards,the paper has proposed an implementation programme of a multi-frequency QAM modulator.The entire work include:module division; completing the write of Verilog HLD code(or IP core call)and simulation of many modules,including,the baseband physical interface(input),Synchronous Overturned and Randomization,RS coding,convolutional intertwined,and stream transform,the differential coding,constellation maps,baseband shaping(including the design of Nyquist filter,half-band filter,CIC filter module or call),the configuration of high-end DAC(output);completing the debugging using evaluation board,and making full use of evaluation board and ChipScope which is a debugging software developed by Xilinx corporation during the process of debugging,and designing certification scheme and complete every module's certification;at last,completing joint debugging of modules in the board,designing certification scheme and completing certification of the whole system.Testing shows that the main system performance complies with technical indicators required by national standard GY / T 198-2003(Specifications and methods of measurement on QAM modulator used in digital cable broadcasting system), Prototype production test can be carded out.
Keywords/Search Tags:Digital Video Broadcasting-cable (DVB-C), Quadrature Amplitude Modulation (QAM), Field Programmable Gate Array(FPGA), Asynchronize Serial Interface (ASI), Reed-Solomon(RS) code
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