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Research And Realization Of Channel Frequency Reception And Parameter Estimation Of Frequency Hopping Signals

Posted on:2017-02-18Degree:MasterType:Thesis
Country:ChinaCandidate:D L ZhaiFull Text:PDF
GTID:2278330488962840Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the rapid development of modern military confrontation technology, data link application is applied more and more widely in the war. Link-16, one of the most widely used data link, is currently employed by the United States Navy and forces of North Atlantic Treaty Organization. It provides presumably secure and jam-resistant tactical information for land, sea, and air platforms. The communication terminal of Link-16 named Joint Tactical Information Distribution System (JTIDS) features minimum-shift keying, Reed-Solomon (RS) coding, symbol interleaving, cyclic code-shift keying (CCSK), frequency-hopping and time-hopping for transmission security.First of all, according to the characteristics of the Link-16 signal, this paper puts forward a channelized receiver model,which can cover all the frequency hopping points, on the basis of the channelized receiver with polyphase filter. Then detection and identification of the output signal are carried out by means of energy accumulation. Simulation results show that the algorithm’s performance in detection and identification under different signal-to-noise ratios can reach subject indicators.Secondly, Link-16 signal channelized receiver model and FPGA realization method of pulse parameter measurement are put forward. Realization of each module is introduced in detail as well. High-speed interconnection between FPGA and DSP is established through RapidlO. Link-16 signals identified by FPGA are transmitted successfully to the DSP for subsequent processing.Finally, minimum frequency shift keying (MSK) and its parameter estimation and demodulation algorithm are introduced. MSK signal parameter estimation and differencial demodulation are realized on DSP. Eventually, a integrated system for signal receiving and demodulating is established based on FPGA and DSP.
Keywords/Search Tags:Digital Channelized Receiver, Frequency-hopping, FPGA, RapidIO, DSP, Parameter Measurement
PDF Full Text Request
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