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Research On Injection-locked Frequency Divider Based On CMOS Technology

Posted on:2020-08-16Degree:MasterType:Thesis
Country:ChinaCandidate:Z Z XingFull Text:PDF
GTID:2518306518963749Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of the high-speed wireless communication technology,the research on phase-locked loop(PLL)frequency synthesizers in millimeter-wave wireless transceivers has became increasingly crucial.In PLL-based frequency synthesizer systems,frequency dividers operate at the highest frequency and consume a large portion of the dc power.So it has a great impact on the performance of the PLL-based frequency synthesizer system and thus influences the overall performance of signal sources for transceivers.Among frequency dividers,injection-locked frequency dividers with high operating frequency and low power consumption attract great attention.However,the locking range of injection-locked frequency dividers is relatively narrow,which limits the performance of wireless communication systems.Thus,this thesis focuses on the design techniques of wide-locking-range injection-locked frequency dividers.And two injection-locked frequency dividers are proposed.Based on 55 nm CMOS technology,a 30 GHz wide-locking-range injection-locked frequency divider is proposed.This circuit employs the distributed injection method to boost the injection efficiency.It also adopts a transformer-based 4th-order tank,which widens the locking range.Besides,a harmonic suppression technique is applied to the output buffer to reduce the undesired harmonics of the ouput signal.This injection-locked frequency divider achieves a locking range of 22.8-36.3 GHz(45.7%)under 0 d Bm injection.The power consumption is 3.54 m W.Additionally,a 60 GHz switchable coupled dual-core injection-locked frequency divider is proposed.The circuit uses different bias currents to turn on or off the cores of the frequency divider,making them operate alternatively in two modes.This divider is able to increase the overall locking range by combining the overlapped locking ranges of two modes.Besides,the parasite capacitance of cross-coupled pairs is employed to improve the quality factor of the tank,consequently reducing the power consumption of the wide-locking-range injection-locked frequency divider.Based on 55 nm CMOS technology,this injection-locked frequency divider realizes a locking range of 53.3-69.6 GHz(26.5%)under 0d Bm injection at 3.15-3.28 m W.In summary,the injection-locked frequency dividers proposed in this thesis both achieve satisfactory performance and can be employed in millimeter-wave PLL-based frequency synthesizers.
Keywords/Search Tags:Injection-locked frequency divider, CMOS, injection locking, frequency pulling, wide locking range
PDF Full Text Request
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