Design And Implementation Of MTD In Radar Signal Processing Based On FFT

Radar signal processor is an extremely important part of the Radar system, with therapid development of Radar signal processing versus Microelectronics, Radar signalprocessor is developing towards the directions of universalization, systematization andmodularization.Because of the advantages of flexiblity, high speed and strong reliability,FPGA echnology are widely used in Radar signal processing system.Moving targets detection is one of the key technologies of Radar signal processingsystem. As to the implementation and design of MTD module, the main research workin this paper focused on the following aspects: Firstly, The main theory of MTDtechnology was briefly introduced, and two kinds of realizing way of MTD wasanalyzed and compared. In order to reduce the resource of consumption, FFT-MTD wasselected. Then radix-2DIT（Decimation-In-Time）FFT algorithm and BOOTH codedSF-CORIC algorithm were introduced in detail. Secondly, Design and Implementationof radix-2FFT algorithm was mainly discussed, A variable point FFT processor and afix point FFT processor was designed. Butterfly computation can be realized bymultiplier and CORDIC, in this paper this two realizing way was compared in area andtiming. Functional simulation and error analysis of two processors were made withassistance of Matlab, the magnitude of relative error was10-4. ISE software was used tosynthesize these two FFT processors based on Virtex5chip, reports show that systemthroughput of viable point FFT processor could be17.4Gbps，and system throughput offix point FFT processor could be32.5Gbps. At last, this paper discussed the overalldesign structure of MTD in detail, and verified the function of design with the Matlabmodel. Simulation results show that the measure error of moving-target speed was lessthan1.5m/s. Logic synthesis in ISE indicates that MTD could work under276MHz，circuit delay is0.47ms，throughput can be12Gps.