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The Design And Implementation Of Data Collection System Based On Flash Array

Posted on:2015-03-05Degree:MasterType:Thesis
Country:ChinaCandidate:X S WangFull Text:PDF
GTID:2268330428959019Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
With the promotion of digitization, networking and big data, storage testing also developtowards to the direction of large capacity, multi-channel, multi-interface form. So this paperdesigns a data collection system that is based on flash memory array, and proposes the systemdesign. The system consists of two parts: the flash array and the collection system, the first isresponsible for storing and the second is for the collection, framing and sending of themulti-channel data.The scale of the flash array, constructed by using the bit extension technique, is4rowsand rows and4columns; the storage speed can reach64MB/s by using the technology ofDMA and the time division multiplexing. For the question of flash invalid block management,a full-related management method is chosen, because its control logic is easy to achieve. Onthis basis, we introduce the internal block diagram of the storage array which is achieved byusing the SOPC technology, and the software flow of the system control.The data collection system is mainly composed of the data receiver module, data FIFOļ¼Œcontrol unit of the FIFO, framing unit, and the long-term transmission unit. The data receivingmodule is to receive different types of data, FIFO is used to cache the data above, with thehelp of the FIFO control unit, we can write the data into the FIFO and read it out purposely,the function of the framing unit is to fetch the data from the FIFO correctly and orderly, andframes the data for the purpose of better management and reliability of the transmission,long-term transmission unit transfers the data to the storage array at300Mbps using LVDS. Inthis paper, each module is designed using VHDL and simulated through Modelsim, from theresults, each module implements the appropriate functionality and meets the systemrequirements.Finally, the system is tested by the host computer, through the data analysis, it provesthat the system reaches the target, the data has not lost, which verifies the feasibility of the system.
Keywords/Search Tags:Storage arrays, data aggregation, framing, VHDL, invalid block management
PDF Full Text Request
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