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High-speed Data Non-volatile Storage Technology Research Based On FPGA

Posted on:2014-09-29Degree:MasterType:Thesis
Country:ChinaCandidate:Z T QinFull Text:PDF
GTID:2268330425468556Subject:Software engineering
Abstract/Summary:PDF Full Text Request
In modern war, damage effect assessment as an important task of the war,judgment, plays a decisive role in decision-making. Through the images reflect thedamage effect of the direct, as far as possible to obtain large field of view angle andhigh resolution and high quality image is an important task of investigation. With therapid development of imaging technology, more and more high frame rate imagingresolution, more and more quickly, through wireless means, to achieve full recovery of alarge number of test data. Therefore the investigation system is usually used withhigh-speed and large-capacity non-volatile memory storage of high-speed real-timeimage data or radar signal, then read back the data to the computer for data analysis.Especially in adverse conditions, realize high definition image is of high speed and largecapacity image data storage, performance requirements for the storage equipment ishigher. One is the high speed storage, storage speed must satisfy the transmission rate ofsampling data; two is a large storage capacity, high speed data acquisition will producea large amount of data flow; three is the reliability of the data storage device of high.Storage devices can work in harsh environments, but also to ensure the correctness ofdata storage. In addition, the structure of memory size, impact resistance, powerconsumption is also an important consideration. Therefore the development of largecapacity solid state storage system has the advantages of small volume, large impactresistance and thermal shock, low power consumption, light weight, low cost plays avery important role in wireless detection equipment.This paper introduces the size of limited space inside, hardware structure andsystem of large capacity data storage scheme to realize high speed rate. This design usesa FPGA as the core controller, the hardware structure and control of two NAND FLASHchips, according to the characteristics of double CE characteristics and pageprogramming flash chip, by using PingPang controlling technology, realizes thereal-time and high-speed data storage. It also established the bad block list information,bad block address mask of the flash chip, so as to ensure the stable working memorysystem. In the data back to read, read card implement the communication bridge using single board, memory card data read back to the computer. This paper also introducesthe reader hardware working mechanism, bad block management software, softwaredesign and the method of converting an image reader application software, finally hascarried on the summary and Prospect of this system.
Keywords/Search Tags:Data storage, PingPang controlling, Bad block management
PDF Full Text Request
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