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Research Of Mismatch Compensation For Transistor

Posted on:2006-06-22Degree:MasterType:Thesis
Country:ChinaCandidate:W Q ChenFull Text:PDF
GTID:2168360152471638Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In semiconductor manufacturing process, the distributing of the process parameter will affect the structural variations of devices and leads to variations in device characteristics and circuit performances. With the development of semiconductor techniques, the feature sizes are aggressively scaled down, circuit performances are expected to be increasingly sensitive to manufacturing variations.The distributing of the process parameter leads to the variations in device electronic, and directly causes the circuit's mismatch, so deduces the ratio of the finished product. The device's mismatch which led to by process parameter becomes more and more important in the IC design.By introducing the effect brought by the semiconductor technique scaled down, the paper presents the reason that causes the distributing of the device electronics parameter, summarizes the effect of the circuit's performance caused by MOSFET's mismatch, discusses the technique such as method of layout design and electronic technique, which was used to avoid the maladjustment. Aim at the circuit cell such as current mirror circuit and DRAM sense amplifier, designing the compensation circuit. The circuit is simulated for 0,25 μ m CMOS process parameters. Also, quantitative analysis was done. Result shows good agreement with the simulation result. The compensation technique is successfully implemented.
Keywords/Search Tags:mismatch, scaled down, current mirror, sense amplifier
PDF Full Text Request
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