Research Of High-speed Driving And Signal Processing System Of Long Linear Ccd

Nowdays the linear CCD is more and more used in military field、Aerospace push broom and other high level applications. Because of its advantages in wide field of view、fast scanning speed and higher resolution. The long linear array CCD imaging system based on FPGA requires real-time target information collection, therefore there is a very high standard in device selection、 driving clock and signal processing circuit design of each part and debugging of communication interface. The research and design of high-speed driving and signal processing of long linear CCD has important value for industrial image acquisition system.In this paper, the high-speed driving and signal processing system of long linear CCD is reviewed, including CCD sensor working principle, main feature of the output signal, the correlated double sampling principle, data acquisition system and so on.According to the industry requirements, a high-speed driving and signal processing system is designed based on long linear CCD image acquisition system. The system is actually divided into five parts:the circuit of CCD drive clock design, the circuit of voltage amplitude modulation design, the circuit of CCD output signal design, the circuit of analog front-end design and part of image signal formatting. The CCD output signal is conducted by the integrated analog front end, including the circuit of correlated double sampling, the circuit of black level clamp, the circuit of digital programmable gain and the circuit of analog-digital conversion in12-bit sampling rate. The core component of the system composed of an Xilinx low cost FPGA. While the CCD drive clock, the analog front-end driven clock, the Interface control and image signal formatting is designed under the ISE14.1development environment.