High-end Routers Clock Board Design And FPGA Implementation

Synchronous Ethernet is a clock synchronization technology based on the physical layer, it can solve the synchronization and timing issues between traditional TDM services and pac(?)et network during the moving towards full IP-based networks.Single synchronous Ethe net is only applicable to the case without time synchronization requirements,then the apph ation scenarios with time synchronization requirements often use the method combined IEEE1588V2protocol and synchronous Ethernet to realize the system’s high precision time synchronization requirements.Synchronous Ethernet based on IEEE1588V2protocol solves the general Ethernet’s bottleneck of long delay time and poor ability of synchronization, therefore it receives extensive attention of the people in the technology industry.Firstly,this paper studies the clock synchronization and time synchronization mode of packet switching network,chooses synchronous Ethernet as the clock synchronization method and IEEE1588V2protocol as the time synchronization method for this topic.Then,this paper presents the features and main technical indicators of the clock board by analyzing the high-end routers’clock synchronization and time synchronization scheme.After that,this paper makes the overall design scheme of clock board,selects the chips according to the concrete proposal,and designs the hardware circuit of each module.Finally,this paper analyzes the logical functions of the clock board,divides it into three modules:the processing of Level3clock,Localbus interface and the processing of time synchronization,introduces the realization and timing design of each module,verifies the correctness of the logic design through the Modelsim simulation.