Design And Implementation Of Reconfigurable2D-DWT In JPEG2000

With the wide application of digital image, the image quality requirements aregradually increased. Huge amount of information becomes a problem that cannot beignored, which makes the traditional JPEG compression standard extra demanding.Due to the good properties, JPEG2000has attracted more and more attention, manyfeatures of which are derived from the lifting scheme based Discreet WaveletTransform (DWT) algorithm, making it a hot research nowadays.Through analysis and research on JPEG2000protocol standard and the waveletalgorithm, combined with the correlation of design, this paper proposes aReconfigurable two-dimensional DWT Module Group (RDMG) design scheme,which implements pre-process,2D-DWT and quantization in protocol and contains atotal of three reconfigurable modes of operation that can meet a variety ofapplications. Function derivation method and exponent estimation method areproposed to supplement the problem of data bit-widths in design, which are used inthe three reconfigurable modes.In hardware circuit design, a column-based parallel processing structure is putforward to accelerate2D-DWT procedure, which can implement both5/3and9/7filtering operation and multi-levels DWT decomposition. Embedded boundaryextension technique is used to deal with1D-DWT. Meanwhile, proposed a kind ofarchitecture of Template Buffer Memory (TBM) whose interface interconnectionlogic is controlled by Finite State Machine (FSM). In the design of quantization,proposed a selection scheme of lossy quantization step size which is applied in theEmbedded Quantization Module (EQM).Using RTL to describe the whole RDMG and building the functionalverification platform based on “Golden Model” strategy to complete the verificationprocess, then implementing the design with FPGA. The results of simulation andsynthesis show that the design can be applied to JPEG2000real-time encodingsystem.