Design And Verification Of DSP Data Cache

With the growing demand for multimedia mobile communication applications, therequirement for embedded processors of operating system supporting, protocolcontrolling and data computing is also increasing. Therefore, embedded DSP withfeatures of MCU and DSP becomes an important research area, and the design of itsdata cache is also of great importance. Data cache based on configurable Scratch-PadRAM and cache for a unified instruction set architecture ZW100DSP is designed inthis paper.Firstly, the basic principles of cache are analyzed, and various strategies tooptimize cache performance are evaluated with performance per watt as metrics todetermine the basic parameters of this design. Based on two-way set associative, LRUreplacement algorithm, the cache controller uses virtual address to index and physicaladdress to determine whether hit or not, and accesses cache memory and tag memoryat the same time to improve the access speed. In order to maintain memory consistency,cache management instructions are added. To achieve configurable ZW100data cachefeatures, special registers module is designed to support different cache size. For thepurpose of reducing miss penalty, a line buffer which can return the critical doubleword to DSP timely is added, and aiming at speeding up memory access efficiencywithout the presence of the main cache, Nano-Cache mode is added for this line buffer.In order to speed up the context switching speed, the data interface is extended to128bits, and context module is added to handle the context switch operation when CSA isnot located in the SPR. In addition, a high-speed bus interface is designed to facilitateits interconnection with other modules. The data path is optimized to satisfy the needsof accessing SPR for the DSP and other bus masters without conflict. Finally, directedverification method in transaction level is applied to improve the verification efficiency,and verification results show that the data cache module fully implements the functionsrequired in the design specification.