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Design Of A Floating-point Processor For High Precision Transcendental Function Operations

Posted on:2022-09-06Degree:MasterType:Thesis
Country:ChinaCandidate:L F ZhangFull Text:PDF
GTID:2518306602494224Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
As the computing core of information processing systems,microprocessors have been widely used in high-performance computing,signal and image processing and other fields.As an important part of the microprocessor,the floating-point processor plays an important role in the performance of the microprocessor.As an important type of floating-point arithmetic,the transcendental function,the speed and accuracy of its operation will affect the performance of the processor system.Aiming at the high-precision and real-time requirements of transcendental function floating-point operations in radar signal processing and unmanned aerial vehicle control,the design of high-performance transcendental function floating-point processors has important engineering application value.Analyzing of the existing research at home and abroad,a high-precision transcendental function floating-point processor,including arithmetic unit,control unit,register bank and interface unit based on a five-stage pipelined microprocessor architecture,is designed to adaptive microprocessor system solves the problems of insufficient precision of floating-point operations of transcendental functions and lack of hardware support.Using the accuracy characteristics of CORDIC iteration and Taylor series iteration in different intervals,a high-precision inter-partition fusion algorithm is proposed,which improves the calculation accuracy of transcendental functions by deepening the number of iterations and partitioning operations.According to the proposed fusion algorithm,an arithmetic unit including an angle compression module,an iterative approximation module and a post-processing module is designed,which can perform high-precision sin,cos,arctan,e~x and ln x functions.In view of the long execution flow of the internal operation of the transcendental function floating-point processor,a centralized decoding control unit is designed,and MCRR,MRRC,LDC,STC and CDP instructions are defined to control the floating-point processor to cooperate with the CPU to complete the transcendental function Operation.In order to solve the contradiction between the 64-bit internal storage space required for the execution of the floating-point processor operation and the data storage format when the 32-bit CPU is adapted,the 32-bit general-purpose registers in the register group are configured to complete the storage of double-precision floating-point number and provide bit-width support for high-precision floating-point operations.Based on the handshake signal,the interface unit is designed to shake hands with the CPU according to the current state and execution process of the floating-point processor,effectively solving the problem of instruction and data interaction between the transcendental function floating-point processor and the CPU.Use hardware description language to complete the design of the transcendental function floating-point processor,perform logic synthesis and power analysis of its RTL code to determine its performance parameters,use Innovus tools to complete the back-end physical design,and use matlab mathematical tools to build a test platform and analyze the accuracy characteristics of the design and the effectiveness of the proposed method in accuracy improvement.A simulation platform was built for the instruction execution process of the transcendental function floating-point processor,and VCS was used for simulation analysis.It was verified that the transcendental function floating-point processor can effectively complete the functions of reading in source operands,performing calculations,and writing back calculation results.Under the SMIC 40nm process library,after logic synthesis,the main frequency is 200MHz and the area is 577611.239?m~2.Through power consumption analysis,the overall power consumption of this design is 148.3m W,of which leakage power consumption is 22.2m W,switching power consumption is 66.5m W,and internal power consumption is 59.6m W.After layout planning,power supply planning,standard cell layout,clock tree synthesis and louting,the back-end physical design is completed.The layout is a regular rectangle of 1040?m×1320?m.By comparing the test results with matlab simulation results,the effectiveness of the fusion algorithm proposed in this thesis is verified for accuracy improvement.After testing,the transcendental function floating-point processor designed in this thesis has a mean square error of less than 1.840e-17.
Keywords/Search Tags:floating point processor, transcendental function, CORDIC, Taylor series
PDF Full Text Request
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