Research Of Baseband Recever Circuit Of UHF RFID Reader Based On FPGA

Internet technology is developing rapidly and is gradually applied in various fields, UHFRFID(UHF radio frequency identification technology) is one of the core technologies of the Internetis growing rapidly. The cost is lower, the performance is superior and the integration level is higher,which are the trend of development. After study of domestic and international UHF RFID readerdigital baseband algorithm, the research on UHF RFID reader baseband receiving circuit based onFPGA is completed.Based on the EPC C1G2protocol, choose the code and decode approach that applied to thereader. According to the link data rate of the protocol, the reader·s baseband receiving circuit isresearched and designed including the control module of receive link, the clock frequency module,micro-wave correction module and the designed processor module. The processor module includesFM0decoding unit, frame processing unit, CRC-16checksum units, etc. The testing and simulationare finished through ISE14.3software simulation software of Xilinx, and the experiment resultsindicate the function is correct.The main results of this thesis are as follows:1、Ideal duty ratio of the signal should be50after the coding, but in the actual circuit, due tokinds of interference and attenuation, duty ratio deviation will happen during signal transmission. Inthis thesis, the duty ratio correction unit for the reader receiving circuit restore is implemented, andthe data signal is closed to the ideal data signal.2、Based on different rates of FPGA, the FM0decoding circuit is designed, the data rates ofEPC C1G2protocol is covered by FM0code rates, several typical values can be used such as40kbps、80kbps、160kbps、320kbps、640kbps, this circuit can decode the received data whichhave deviation rate.3、After a profound analysis of CRC serial and parallel algorithms, the CRC serial parallelcombining algorithm is deduced, the computing rate is higher than the serial encoding method,while compared with parallel encoding method, it overcome the problem that the number of databits are not integer times of8.