The Design Of High Performance Programmable Reference Used For Very High Speed ADC

As the bridge between analog world and digital world, ADC has very importantstate. With out the ADCs, we can not appreciate beautiful music and movie, can notcommunicate with our families use mobile phone. Reference is an important part ofADC, the performance of the reference will influence the performance of the ADC andelectronic products.In this paper, we design a programmable high performance reference. In the secondchapter, we discussed the effect to the performance of the circuit result from some notideal factors, and introduce the programmable correction to against these affects. In thisdesign, the whole circuit has four parts: the reference core part (include the operationamplifier), the output voltage amplitude control module, the output voltage commoncontrol module, and the differential output module.At the reference core part, we use the Vbenonlinear compensated technical that willbe more accurate to compensate the temperature nonlinear of the output differentialvoltage. The structure of the reference core is the BiCMOS current model bandgapreference, which is more accurate than others. Also we use the cascode mirror todevelop the accuracy of the mirror current. In order to get mass gain to develop thepower rejection of the reference, the operation amplifier we select the cascode foldstructure. Additional, we design the start-up circuit to ensure the normally startup of thereference.We design the amplitude control module and the common model control moduleuse same structure DAC. The control of the output differential voltage is accomplishedby change the current flow through the differential output module, and the structure ofthe DAC is the current model type, this type is convenience for us to change the outputvoltage directly and without the buffer. We use the complementary switch in this DACto against the affect of the delay between the base and the emitter of the BJT.At the differential output module, we can get the differential voltage directlyinstead of the convert from a single terminal. The current from the control DAC affectthe output voltage in this part, accomplish the function to adjust the output differentialvoltage.After finish the design of the schematic is the design of the layout. During thedesign of layout, many factors that would affect the accuracy of the reference been considered, such as the mismatch, the parasitic capacitor and resistant and the latch-up.Especially the mismatch of the OPA input pairs, the BJT and the resistant of thereference core. After the simulate of layout and the parasitic, the amplitude of the outputdifferential voltage is250.41mV, the common modle voltage is1.8015V, and the TC is0.88ppm/℃in the range of-55-125℃, the low frequency PSRR is96dB; The LSB ofthe common modle voltage control module is0.239mV, the control range is-30.35mV~30.39mV; The LSB of the amplitude control module is0.515mV, the controlrange is-64.975mV~65.618mV. All these parameters meet the demand of this designand the demand of the ADC to the reference.