Verification Of AMBAIO System Based On SoC

With increasing complexity and scale of the SoC(System-On-A-Chip) designs, theverification effort grows at a double-exponential rate with respect to the Moore’s Lawcurve. Perfect verification has been viewed as a key to reduce design risk and shortentime to market. In this Paper, under the background of AMBAIO system verification,we have built verification platform and completed system verification by takingadvantage of the verification features of SystemVerilog language and VMM verificationmethodology.AMBAIO system which is based on the AMBA bus architecture consists of twosubsystems. Each subsystem has integrated MAC functional modules with its AXI bus.Firstly, the system’s overall design, structure and its impact on the functionalverification have been analysed deeply, then we formulated the strategies andtechnological processes of verification. On this basis, we completed verificationplatform design and carried out every subassembly of the platform in the form ofplanning and implementation based on VMM. At the same time, a coverage-drivencombined methods of assertion verification has been introduced to the platform. So weare able to perfect the test stimulates, control the progress of verification by means ofanalyzing code coverage, functional coverage and assertion coverage.Verificationresults show that there are several characters in verification platform that we designedfor AMBAIO system, such as the clearness of structure and arrangement. The rationaluse of verification platform can saved time greatly of debugging and reducedverification cycles. If we want to verify other functional modules in system besidesMAC, only a small amount of modification is necessary to create a new test. Iteffectively enhances the confidence of the design verification process.The content of we researched in this paper is supported by National Core-High-Base Major Project of China under Grant No.2009ZX01028-002-002. The achieve-ments of research have been used in project practices.