Research To Reduce Quantization Noise In Fractional-N PLL Applications

In communication systems and electronic fields, the phase-locked loop circuit has been widely used. With programmable divider and high frequency resolution, the fractional-N phase locked loop circuit is occupied a dominant position. But its dynamic divider will cause quantization noise in the output signal. How to reduce quantization noise becomes one of the key technologies of the fractional-N phase locked loop circuit design.In this article, the charge pump phase locked loop circuit as a typical fractional phase locked loop circuit is chosen for the study. The structure and working principle of the charge pump PLL are studied. Then the combination of using MASH1-1-1-1sigma-delta modulator and multiphase circuit to reduce the quantization noise of the fractional-N PLL is presented. The characteristics of noise shaping of the sigma-delta modulator and the transfer function of the modulator are studied, which proves that MASH sigma-delta modulator has better noise shaping characteristics than ordinary high-order sigma-delta modulator. At the same time, this paper does an analysis of existing structure of multiphase circuit is and make an improvement so that the circuit scale can be reduced. Establish a charge pump phase locked loop circuit model with Simulink and make a simulation. We can find that he quantization noise in the phase locked loop output signal can be reduced to-100dBc/Hz, which has a20dB improvement than before in the result of simulation. The results of the study show that the combination of MASH1111sigma-delta modulator and multiphase circuit can effectively reduce the quantization noise in the phase locked loop, which makes a good reference to actual design of the phase locked loop circuit.