Research Of The Chaotic Video Encryption Based On FPGA

Not until recent years does encryption technology based on the chaotic theory become a popular cryptography. Chaotic phenomenon is a determinant, random-like process which appears in the non-linear system. Also, it is a acyclic, convergent but unconstricted process which is sensitive to initial condition. It is these unique features that makes the chaotic encryption technology a hot spot. However, so far the objects of the chaotic encryption have been restricted mainly to the audio and static image data. As it turns out, the relevant researchs on the dynamic video data are relatively inadequate. Due to the considerable data in the video sequence, it proves time-consuming and less efficient to implement encryption via the traditional software. Hardware circuit, with its parallel high speed feature, has become a popular way for the real-time processing. Thus,this paper will discuss about how to fulfill the design of the chaotic encryption algorithm and the processing of digital video data using the FPGA technology which is based on a complete hardware processing method. Aside from that, chaotic security system can be divided in two category--high-dimensional system and low-dimensional system. High-dimensional system provides better randomness and security for the data, in contrast, low-dimensional system have simple form and can be easily implemented on hardware. But the drawback of the low-dimensional system is limited key space and vulnerable to the exhaustive attack. As a result, in the engineering application, we should select the proper chaotic system on the proper application condition.Video data composes of several serial images. Based on the current features of the chaotic image encryption, in combination with gleaning, ordering, analyses and synthesis of the information throughout the world, this paper details the research of the chaotic video encryption method and encoding system design. The content of this whole paper includes:1. Hardware implementation of the video capturing system based on FPGA technology. First of all, this paper briefly introduce the whole architecture diagram of the video capturing system. Secondly, the specific design flow of video capturing is elaborately elucidated. In this design, the paper use Verilog hardware description programming language to design the five major module in the video capturing system, including I2C protocol interface driver module, ITU656video decoding module, FIFO cache module, SRAM reading and writing controller module, VGA timing controller module and the like. At last, use a top-level module to piece the well-packed module together, fulfill the top-to-bottom design of video capturing system based on FPGA.2. Achieve the implementation of the chaotic dynamic video encryption based on chaotic Cat Mapping algorithm. In the paper, it does the research on the rudiment of the chaotic Cat Mapping algorithm, and analyses the limitation and shortage of traditional static image encryption with the Cat Mapping algorithm. On the basis of the analyses, an improved chaotic Cat Mapping algorithm which can apply to the video data encryption is put forth, aside from that the mathematical formula is included. Taking advantage of the parallel operation in the FPGA technology, it can drastically reduce the time consumed by the chaotic Cat Mapping algorithm. Besides, with the help of the unique hardware structure in FPGA, to name a few, the state machine and the pipeline, this paper accomplishes the design of the improved chaotic Cat Mapping algorithm and implementation of video encryption. Finally, this dissertation elaborates on the actual hardware experiment result.