Research Of Software/Hardware Partitioning Methods For Reconfigurable System On Chip

With the continuous development of the IC process and manufacturingtechnology, the microprocessor core, programmable logic devices and other circuitblocks can be integrated into a single chip, which greatly improves the efficiency andflexibility of embedded system design. In this excellent situation, reconfigurableFPGA-based system which contains a microprocessor core that implements softwareprograms and reconfigurable logic devices that implement hardware logic hasemerged. Through hardware/software(HW/SW) partitioning, designers determinedimplementations of different modules of applications software or hardware, andefficiently made it mapped to a microprocessor or a reconfigurable device toimplement. Therefore, the research for efficient methods of HW/SW partitioning cangive full play to the structure advantage of reconfigurable system chip and improveperformance and efficiency of the system.In this paper, a systematic study on relevant basic knowledge of HW/SWpartitioning was conducted. The focal point of this paper is the analysis of concreteproblems in HW/SW partitioning, next, the present situations and achievements aboutHW/SW partitioning home and abroad have been summarized. On the basis of that,innovation of this paper has been put forward, that is, process-oriented level approachof the HW/SW partitioning, and the main work is as follows:Firstly, the improved algorithm of dynamic programming-based HW/SWpartitioning has been proposed. It analyzes the characteristics of HW/SW partitioningproblem，starting with the unified programming model and software and hardwarecollaborative function library, granularity is restricted in the process level(function),and DAG is used to describe the system function. Lots of factors such as the executiontime and system cost were taken into consideration, then a optimal system model withmultiple restraint and objects were erected. At last using principle of dynamicprogramming to solve the optimal solution and try to improve the solving process byfinding the local jumping point. Simulation experiments show the algorithm proposedin this paper can quickly find the best solution to improve efficiency and resourceutilization.Secondly, a run-time method of the HW/SW partitioning has been proposed,which mainly consider part of dynamical reconfigurable character and ability, as well as the important impact of the number of function calls. According to the informationthat system is running, we use gray prediction mechanism to estimate the dynamicfunction of the number of calls in the next time, then analyze the result in order toadjust partitioning scheme which can adapt to the corresponding change in the runtime. In addition, through the Hong Feng v1.0software, a system which to improvesoftware and hardware co-design automation processes by dynamic link technologywas designed and implemented. At last the experiment proved that the run-timemethod of the HW/SW partitioning can meet the real time requirement ofreconfigurable system design, and is more flexible than static partitioning algorithm，more conducive to improving the efficiency of resource utilization and reducing therunning time, become in line with the practical work.