The Design And Implementation Of High Speed And Large Capacity Storage Array Controller

With the development of space astronomy technique and the dramatically growthof data output bandwidth, human beings are getting more and more interested in thestudy of the speed, capacity, power consumption and reliability of the informationstorage array. As the core of the storage array, the controller controls the operation ofthe whole system. In this paper, according to the research based on NAND Flashmemory of the high speed and large capacity onboard storage array, the controller of thestorage system is designed and implemented.Targeting at300MB/S high speed data source from the simulate board, the systemuses NAND Flash Memory as the basic storage device, and forms800GB storage arrayto achieve high speed data storage. First this paper gives the hardware design of thesystem, and describes the composition and hardware implementation of controller basedon DSP and FPGA in detail. Then a control module, which realizes the reading, writing,erasing, transferring, transforming memory board of storage array as well as bad blockmanagement, and a reliable transmission module, which realizes the parallel extendedpipeline processing and the Serial to Parallel conversion of300MB/S high speed data,are designed and implemented in the controller. Finally, the debugging of the hardwareand the software of the system is presented and the solutions of some problems thatencountered in debugging the system are given.The results of repeating test under different conditions have showed the rationalityof the system.