Research And Fabrication Of MOSFET With High-κ Gate Dielectric

As developing of semiconductor technology, the dimension of devices in an integrated circuit (IC) becomes smaller and smaller. When the feature size is scaled down to several nanometers, SiO2gate dielectric of metal-oxide-semiconductor field effect transistor (MOSFET) will be scaled down to less than2nanometers, and leakage current through gate dielectric will exponentially increasing with the decrease of gate dielectric. What is the most important is that the power and heat will increase significantly, and the chip performance, longevity and stability will be severely degraded. All the problems hamper the development of integrated circuit in accordance with Moore’s Law. But luckily a method that replaces traditional gate dielectric SiO2(dielectric constant ε=3.9) by high dielectric constant (ε>3.9) materials is proposed, and it successfully resolves the problems. However, replacement of the gate dielectric and scaling of nano-MOSFET require adjustments of semiconductor manufacturing process and usage of novel materials, which have crucial impacts on the chip performance and development of semiconductor technology. Though the technologies are now mature in international, there is still a big step between domestic and international semiconductor manufacture technology. In view of the monopoly of foreign advanced technology and in response to the vocation of innovation of our State, we have studied the process of MOSFET and fabricated high-κ MOSFET devices with HfTiON gate dielectric, titanium nitride (TiN) or titanium aluminium nitride (TiAIN) metal gate and copper connecting line.With three chapters, this thesis mainly describes how to fabricate high-K MOSFET devices with HfTiON high dielectric constant gate dielectric. In the first part (Chapter2), device type, physical structure and dimensions are laid out under lab circumstances. Materials and fabricating processes are designed by computing on experience and theory. In the second part (Chapter3), the fabricating process, including graphic lithography, implantation, films deposition, reactive ion etching (RIE) and Lift-off technology are specially described. Besides usage of high-K gate dielectric, lift-off process, which can effectively avoid past-etching of RIE, is generally employed, and fabrication of gate with matching work function material nitrided titanium is applied too. Chapter4mainly shows the measurement property of the high-K MOSFET. In this part, the MOSFET devices are tested with Keithly CS4200in Wuhan National Laboratory of Optoelectronics, and the results are analyzed. At the last, threshold voltage (Vt), output characteristics (Ids-Vds), transfer characteristics (Ids-Vgs) and leakage current (Ig) of the device are discussed in details too.