Font Size: a A A

The Research Of High Voltage MOSFET Based On CMOS Process

Posted on:2005-02-13Degree:MasterType:Thesis
Country:ChinaCandidate:X L HeFull Text:PDF
GTID:2168360125963020Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The design of analog and digital mixed circuit has been paid more attention increasingly. So many engineers have to face a question, that is, how to produce high voltage devices and make them compatible with low voltage circuits. Motorola Inc. is developing 18V and 30V high voltage MOSFET integrated with CMOS low voltage circuit for the design of LCD Driver circuit used in mobile telephones. Some theoretical research and practical work has been done around the subject. The idiographic contents include several aspects as follows:Simulation programs named "DIOS" and "DESSIS", which are included in process and device simulation software named "ISE", are used to do some process simulations and device simulations. The simulation results show that, in the 18V and 30V MOSFET, the breakdown point lies around the junction between the Drain and the Substrate, which is under the gate and close to surface. At that point, electric field is the strongest and impact ionization ratio is the highest. At the same time, the simulation results also show the field plate structure can effectively reduce electric field intensity and decrease impact ionization ratio under the gate. As a result, the breakdown voltage at that point increases. These simulation results have been validated by experiment measuring. And the mechanism of field plate operation has been discussed theoretically.Field plate is formed by poly-silicon extending to the Drain in high voltage MOSFET. Drift region is made at the side of the Drain according to RESURF theory. The structure of N type burial layer has been adopted in 30V N-MOSFET, and N type isolation well is made to contact this burial layer. The isolation well and burial layer make up isolation region so as to separate high voltage devices from other devices around them. On the other hand, the separation of P type MOSFET mainly depends on self-isolation. Besides, CMOS integration process for high voltage has been designed.The layouts for high voltage MOSFETs have been designed and the main design rules are explained. The idiographic data for those rules are given according to the practical measuring results.The research for the mechanism of field plate operation in this paper can offer some theoretic guidance for applying field plate in high voltage MOSFET. Measuring for layout design rule has practical directions to the layout design of high voltage MOSFET and provides basis to setting idiographic parameters of parameterized cells in device model library.
Keywords/Search Tags:High Voltage MOSFET, Terminal Structure, Field Plate, CMOS
PDF Full Text Request
Related items