Design Of AVS Video Decoder Base On Multi-Core Architecture

With the development of multi-media audio and video technology, digitalmedia has been deep into every corner of social life. In the digital erabackground, AVS is committed by Audio and Video Coding StandardWorkgroup of China. AVS is one of the second generation of sourcecoding/decoding standards and own independent Chinese intellectual propertyrights. AVS reaches twice coding efficiency of traditional MPEG-2international standard, represents the current international advanced level. Inorder to meet the development of multimedia technology, SOC systemsolutions have been proposed. The system is composed of RISC andapplication specific co-processors, which is not only better than generalprocessor in the performance but also better than the ASIC chips in theprocess flexibility. SOC system solutions become a new generation of videodecoder chip. The purpose of this paper is to use SOC technology and torealize real-time video decoding based on AVS Jizhun Profile byhardware-accelerated optimization program. First this paper introduces AVS video standard and explains why choosingAVS level4.0as our standard. Second, we give the specific description of theLeon2SOC platform, then build our decoder system and realize AVS videosoftware decoding. Third, in response to the efficiency problem, this paperpresents a multi-core architecture hardware-accelerated optimization program,which uses Leon2co-processor. Then we set an interface from Leon2co-processor to memory controller for improving the data access. Forco-processor design, we target four mainly decoding modules, integertransform, intra-frame decoding, inter-frame decoding and loop filter. Afterachieve AVS standard decoding, we optimize four co-processors from threeaspects, hardware area, data structure and performance.Choosing AVS level4.0as video decode standard, this paper achievesQVGA (Quarter Video Graphics Array320x240) video decoding at3fpswithout any optimization when system clock frequency is100MHz on Leon2SOC platform. Then QVGA video decoding at15fps is achieved throughhardware acceleration optimization on the multi-core architecture which leon2SOC platform which system clock frequency is100MHz.