Research And Design Of A Simulation Platform Based On SPARC V8Architecture

With the embedded system becoming increasingly powerful, its application is extending to all areas of life, which makes it be a focus to researching on embended processor. Howerver, due to its structure becoming more and more complex, that consumes a lot of time and cost to design and implement embedded processors and develop system softwares directly.SPARC v8is a architecture of RISC with high performance and scalability, embedded processors based on which have been applicated in national defense, aerospace and so on. Based on SPARC v8architecture, this paper designs and implements a simulation platform, with which the processor to be designed can be verified and performing test on realated softwares. Besides, this simulation platform enables developers and testers implement their co-processor module by calling the designed interfaces.By carring out a detailed analysis and summary on the SPARC v8architecture, this paper designs the simulation platform with kernel module, the instruction execution module, storage unit simulation module, public function module and interface function module. Instruction queue was adapted to simulate the pipeline structure, and analog clock was used to simulate the clock cycle of performing an instruction. This simulation platform is an instruction level emulator, using instruction queue to simulate the pipeline structure, and analog clock is adapted to simulate the clock cycle of performing an instruction. Considering different people have defferent requirements of embedded processors, this paper implements an entendable co-processor unit based on the exsiting functions of embedded processors. With a example of CRC unit, this paper introduces how to implement a co-processor unit by calling the related interfaces.At the end of this paper, the simulation platform is implemented on Linux system. This simulation platform can lunch the executable binaries built by compilers (such as sparc-elf-3.4.4) and run them with debug options. This platform has been applicated in some embedded processors.