Hd - Digital Video Booth Chip Research And Design

Digital video presenter based on photoelectric technology transform information into output of image signal through CMOS/CCD sensor, the information includes prac-ticality, pictures, draft and so on. The demonstration device displays the information. The digital video presenter widely used in teaching, citing evidence, meetings, and military, medical and other fields. Meanwhile, with the rapid development of Integrate Circuit design methodology, the design level of ASIC chip has been improved greatly, and ASIC design enters a new epoch based on VDSM:system on chip (SoC).In the case of logic function realization of the design, how to use ASIC technology to realize the chip of Digital video presenter is researched. The main contents and re-search results are as following:1. The framework of the digital video presenter is studied, to complete the logic design of the video input module, IR filter module, storage module and output module. Each other module of the RTL code is simulated and the overall functional simulation and verification is to ensure the correctness of the whole design.2. Finished the FPGA of the verification of the system, the validation results pro-vide the reference for the ASIC design, and better improve success rate of the chip is taped out, and the ASIC design including:logic synthesis (Design Compiler), formal verification (LEC), automatic place and route (SOC Encounter) and Static timing analy-sis (Prime Time).3. Accompanied with GSMC0.18μm technique and Cadence’s SoC Encounter automatic place and route, and accompanied the backend work of the digital video pre-senter chip which scale is more than1.2million gates. The main works can be summa-rized:(1) The chip Core Voltage:1.8V;(2) I/O voltage:3.3V;(3) the Average power consumption:6.95×102mW;(4) Average output current:12mA;(5) the Chip size:4.8mm×4.8mm;(6)The pin number:160(including test pins).