Analysis And Design Of Transimpedence Amplifier For10Gbit/s Optic-ifber Communication

With the progress of the society, the amount of information is increasing quickly, and people havehigher requirements for processing speed of information. Optic-fiber communication systems are theprincipal parts of information super-highway for its advantages such as wideband, large capacity, longtransmit distances with low losses, small volume, light weight, anti-interference, corrosion resistant, energysaving, abundant resources etc. So, it’s important to design high speed integrated circuits (IC) foroptic-fiber communication systems with independent property.The preamplifier sites in the front of the optical receiver and its performance has great effect on theperformance of an optical receiver. The task for this project is to design a preamplifier for the SDH(Synchronous Digital Hierarchy) STM-64(10Gb/s) optical receiver. The trouble is the broadband of thecircuit.The function of the preamplifier is to amplify the current signal from the photo detector and convert itto a voltage signal. This paper, firstly, introduces the photo detector’s noise performance and equivalentcircuit briefly. Secondly, we discuss the low-impedance, high-impedance and transimpedance preamplifiersin detail, and decide to use the transimpedance as the circuit model. Thirdly, we discuss the common gate,common drain, common source, RGC preamplifier in detail from four respects: input and outputimpedances, gain, noise and band. At last, we decide to use the RGC structure as the input stage. To satisfythe high band of the circuit, we use several ways to improve the band. By using the RGC structure as theinput stage, we can not only avoid the photo detector’s parasitic capacitance, but also use the zero toimprove the band. By using the feedback structure, we can decrease the dominant pole’s equivalent resistance. By using the common drain stage, we can avoid the Miller capacitor from the next stage. Byusing the capacitance degeneration technology, we can get a zero to coincide the dominant pole. Then theband can be improved up to8.69GHz, which is satisfied the system requirements. Finally, we achieve thelayout of the proposed circuit. We introduce the flow of the layout design and the layout design rule, thelayout design rule for performance briefly. In order to have the best performance, we also use sometechnologies, such as the dummy devices, symmetry, interdigitating devices and cross-quading technique.We use two softwares of Spectre and Virtuoso from Cadence company and0.18μm process fromTSMC to design the circuit and layout. And the gain of our proposed circuit is40.1dB, the bandwidth is8.69GHz, the average noise current spectral density is12.71pA/Hz and the power dissipation is only15.33mW under the1.8V supply voltage.