Theory And Experiment Investigation On InP-Based HBT And The Monolithic Integrated Photoreceiver

With the rapid development of WDM optical communication and increasing requirement of bandwidths, fiber communication will evaluate to the new generation with intelligent, integrated, low cost and high dependability.Compared with the discrete optoelectronic devices, the optoelectronic integrated circuits (OEICs) have the advantages of smaller dimension, lower parasitics, lower cost, better performance and higher reliability. OEICs have already become extremely attractive domain as the fundamental research subject in the area of optical communications and optoelectronics.InP-based heterojunction bipolar transistor(HBT) is the essential composition element of OEICs, also has many attractions in the field of fiber communication and microwave communication, so the research on InP-based HBT has extremely important meaning.Supervised by Prof. Xiaomin Ren, and through participating in the research projects relative to OEICs, the author focused on the design and fabrication InP-based HBT and monolithic integrated photoreceiver. Research results, as listed below, have been achieved.1. Proceed from physical characteristics of materials, the physics structure and performance parameters of HBT has been analysed. The expressions of each parameter have been derived out, The physical model of HBT has been constructed. The relationship of physical parameters of InP-based HBT under different bias has been studied, the whole scheme is established to optimize the design of InP-based HBT2. The DHBT (double heterojunction bipolar transistor) used for monolithic integrated photoreceiver is analysed. A novel composite collector layer structure is presented for the first time, which better solves the poor breakdown voltage of SHBT(single heterojunction bipolar transistor) and the electron blocking efforts of traditional DHBT. In addition, the epitaxy layer of this structure is easy to grow and the electron velocity of collector is high.3. Based on the process flow of our Lab., Developing and optimizing the process conditions for fabricating 2μm size style InP-based HBT and monolithic integrated photoreceiver have been completed. The design of epitaxy wafer and layout for both discrete devices and integrated devices have completed4. The InP-based HBT, PIN-PD and NiCr resistance have been fabricated. The testing system has been set up. Results of these devices are described as the following: as to the 2μm size style of InP-based HBT, the open voltage is 0.43V, the break down voltage is beyond 2V, current gain is 90, the the cutoff frequency f_? is 30GHz; as to the PIN-PD of 22×22μm² incidence area, the 3dB responding bandwidth is 16GHz; as to the NiCr resistance, the square resistance is 100Ω.5. The large signal and small signal SPICE circuit models of HBT and high-frequency model of PIN photodetector have been constructed. Based on the HBT which is fabricated in our Lab's process flow, using direct extraction method, all the HBT's SPICE parameters have been extracted. Using these SPICE parameters, The circuit models of HBT and PIN photodetector have been obtained. The emulation results of model are quite corresponded with the testing results of relevent devices. Which prove that the parameter and model are comparatively accurate6. Based on models of HBT and PIN detector, we have designed sevarial forms of front-end photoreceiver's circuits .We use the high-frequency circuit emulation software to test the DC and AC characteristics, optimize and contrast the circuit styles according to the emulation result, fabricate the circuit forms which have relatively simple structure and excellence performance. These circuit forms will be the preparation for the designing the monolithic integrated photoreceiver.7. The monolithic integrated PIN-PD+HBT photoreceiver has been fabricated. The incidence area of PIN-PD is 22×22μm², InP-based HBT is 3μm size style, the square resistance of NiCr resistance is 100Ω, the amplifer circuit is transimpedance feedback amplifer with one stage common emitter and output buffer circuits. When the detector added 2.5V reverse bias voltage and the circuit added 2V bias voltage, the test result of this photoreceiver is: 3dB bandwidth of the circuit reaches 3GHz, the transimpedance is up to 800.8. A novel improvement scheme has proposed for the first time: The monolithic integrated photoreceiver with RCE-PD +HBT structure. Such integrated structure has effectively solved the trade off problems of designing shared epitaxy, can increase the quantum efficiency of the detector notably while keeping HBT high-frequency performance. The performances of RCE-PD +HBT have analysed, and the preliminary fabricating and testing of such integrated device have carried out.