Research On CMOS Current Multipliers/Dividers And Their Applications

Along with the development of the current-mode multipliers/dividers, research and development for CMOS current-mode multipliers/dividers has gradually become the mainstream trend. Compared with BJT multipliers/dividers, CMOS current-mode multipliers/dividers have obvious advantages in the signal bandwidth, linearity, dynamic range, signal processing ability,etc.Thus they are widely used in the signal processing,mainly in fuzzy logic controllers, artificial neural networks, programmable amplifiers, diveders, modulators, phase discriminators, current conveyors, filters, sine/cosine synthesizers, cryptography systems, etc. They can be considered as a useful building block for IC designers.Current multipliers/dividers based on square-root,squarer/divider circuit may become a potential kind because they have good linearity,low power consumption,simple structures, wide signal bandwidth and high precision. The dissertation studies the realization method of square-root, squarer/divider circuit,the structures,design method and realization of CMOS current mode multipliers/dividers based on square-root and squarer/divider circuit and their applications in analog amplitude modulator, programmable current amplifier, and ECCII,etc. The research work and innovation points of this dissertation are included as follows:(1) Translinear loop is constituted by MOS transistors. Current-mode square-root circuit and current-mode squarer/divider circuit based on the translinear loop are designed. A novel CMOS current mode multiplier/divider based on square-root, squarer/divider circuit is implmented.HSPICE simulation results using0.35μm CMOS process model show the circuit can well realize functions of multiplier/divider and a-3dB bandwidth of35.1MHz,working at a supply voltage of3V,with a good performance in terms of linearity, frequency response. And its static power consumption is202.68μW, output current range is0～25.1μA, nonlinear error is0.85%, total harmonic distortion is0.14%. Compared with the multipliers/dividers designed by Tanno, Lopez,et al., the proposed multiplier/divider circuit has many advantages,-3dB bandwidth raised, power consumption reduced,power supply voltage reduced, linearity improved, and a relatively more advanced0.35μmCMOS technology used, and can save chip area. (2) The analog amplitude modulator and programmable current amplifier are implemented by choosing the input and output signals,without changing the circuit structure and component parameters. HSPICE simulation test confirm the validity of the proposed scheme for applications.(3) A novel simple CMOS current multiplier/divider is studied.The current multiplier/divider is also composed by square-root and squarer/divider circuit.Making this circuit as the foundation and a core circuit, a programmable current amplifier is implemented. And then build voltage to the current converter, current mirror and other circuit,a new CMOS electronically tunable current conveyor (ECCII) based on programmable current amplifier circuit is presented, with low power voltage(±1.2V) and continuous programmable current gain and highly linear wide tuning range and high output impedance at terminal Z. The current transfer ratio of the conveyor can be accurately controlled by the ratio of the DC bias currents. HSPICE simulation results using0.35-μm CMOS process model confirm the expected good performance of the proposed ECCII in terms of linearity, frequency response, tunability, and power consumption.