Font Size: a A A

Multi-channel Analog Hybrid Motor Drive Chip Testing Technology Development And Implementation

Posted on:2012-06-01Degree:MasterType:Thesis
Country:ChinaCandidate:C H QuFull Text:PDF
GTID:2248330371965342Subject:Electronic and Information Engineering
Abstract/Summary:PDF Full Text Request
Low-power multi-channel motor driver IC is currently mainly used in digital cameras. In practical applications, it only need one chip and can drive several micro-motors which can precisely control the camera lens focal length changes, how fast the subject is precise focus and digital camera shutter switch control in the digital camera. The multi-channel motor driver IC for digital cameras to bring a smaller size, more features and lower power consumption. Therefore, it is favored by many manufacturers and has a huge demand in the current consumer electronics market.However, with the improvement of chip integration and functional complexity which brings about new challenges of testing. As the IC have more pin count and more complex functions, the test time will be increased and which directly leads to increase cost of test. Currently it is through parallel test to reduce the test time and cost in IC testing. The parallel test refers to the ATE (automatic test equipment) to complete testing several IC at same time. For example, the test efficiency will be improved to m-fold if m ICs are tested by parallel and test time will be reduced to 1/m of one IC.The thesis is based on parallel test to research and develop the test plan of multi-channel motor driver IC. Considering the specification of the chip and the feasibility of practical application, it’s better to choose the local ATE vendor and 4 sites for parallel test. Because when the number of site is more than 4 sites, the requirement of ATE and handler will greatly increase as the increased cost of test equipment. And the stability of test system will became worse if the number of site become more. The test board is designed by a combination methods and each site uses a separate power supply. That can simplify the design and reduce interference and reduce the size of test board. Also the digital signal distortion is improved through increasing the shielding and impedance matching resistors. In terms of process definition and function calls by reducing the redundancy of the entire test program and test time. Finally, by GRR verify the test system to determine the stability and reliability.Finally, all the above work managed to increase the test speed as well as lower the test cost while ensuring the product yield and the test accuracy.
Keywords/Search Tags:Motor driver IC, ATE, Parallel test, Yield
PDF Full Text Request
Related items