Analysis Of Adc Jitter Measurement

With the increasing of data rates in communication systems, the quality of clock becomes the key factor to affect the system performance. The short-time variation of clock directly works on the index of systems. Timing jitter has always degraded electrical systems. To reduce jitter in system redesign, it is needed to find out the characterization of jitter and identify jitter sources. It’s necessary to test and evaluate the clock quality. Some people who are studying clock jitter measurements get that it’s possible to deduce clock jitter by analyzing the parameters of the output signal with ADC. There are several methods put forward to measure jitter by ADC, such as interference sampling including simple interference sampling and complex interference sampling and SNR measurements.This thesis studies the ADC measuring clock jitter technology based on simple interference sampling. The main contents are illustrated as follows:The definition and categories of jitter are introduced, and how to propagate in serial communication systems. In this thesis, jitter is analyzed both in time domain and spectrum domain. The principle of the simple interference measuring jitter is deduced, simulated and validated by MATLAB. The sine wave is obtained by DDS based on FPGA, so is the jitter clock. The testing system is built to collect data, then the data is analyzed by MATLAB.