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The Research Of Key Technology In The Dual-channel High Speed Data Recorder

Posted on:2013-02-20Degree:MasterType:Thesis
Country:ChinaCandidate:S YanFull Text:PDF
GTID:2248330371468385Subject:Precision instruments and machinery
Abstract/Summary:PDF Full Text Request
Aircrafts are equipped with a special recorder which is used to collect and store thevariational parameters as well as the working condition during flight, after which datainformation could be able to read out of the recorder and be analyzed. Dual-channel highspeed data recorder is designed and developed to collect and store a channel digital signal ofcontrol system and a channel image information as well as real-time monitoring for a certaintype of aircraft.Firstly, this thesis reviews the domestic and overseas background and future trends ofdata recorder. With the aim to achieve the requirements of the technical indicators, thefollowing overall design is proposed based on the idea of modularization with high reliability:FPGA is the data recorder’s major logic control component and two slices of NAND FLASHis used as its storage media to record two channel signals separately. Then this paperelaborates the structure and working principles of every functional unit of the data recorder.To solve the problem of low read-in speed of FLASH, high-efficiency managementarithmetic of invalid block and interleave two-plane page program technology is proposed,which is able to improve the speed on writing FLASH up to 30MByte/s and sufficiently meetthe requirement of high-speed storing for imaging. In addition, this thesis also analyzes theinstability caused by the interference of key signals and proposes the solution to remove it,and presents the relevant VHDL program. In order to make the time sequences match well forthe system during signal transmission, the thesis also proposes an approach to build anon-chip FIFO based on IP core technology to buffer data effectively. Besides the above, thisthesis had an in-depth study on the high-speed erasing and reading technics of FLASH.Finally, this thesis tests all the units of the data recorder and analyzes the data stored inthe recorder. The results indicate that the high-speed data recorder designed in this thesis canmeet the requirements of the mission with high reliability.
Keywords/Search Tags:Data recorder, real-time monitoring, NAND FLASH, Interleave Two-plane Page Program technology
PDF Full Text Request
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